PT-2024-23257 · Microchip+2 · Mplab® Harmony 3 Core Module+3

Fehr Gmbh · Published 2024-05-28 · Updated 2024-06-11 · CVE-2024-30212

Positive Technologies (AI Summary)

CVSS v4.0

7.0

High

Base vector

AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/VI:H/VA:H/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X

Name of the Vulnerable Software and Affected Versions No specific software or versions are mentioned in the provided descriptions.

Description The issue allows an attacker to expose and potentially overwrite the full RAM by initiating a SCSI READ(10) command via USB with the largest LBA (0xFFFFFFFF) and a default block size of 512. Increasing the block count can lead to full RAM exposure. The same method can be used to write to this memory area, potentially allowing an attacker to overwrite pointers in RAM and return data from any other offset, including Program and Boot Flash.

Recommendations At the moment, there is no information about a newer version that contains a fix for this vulnerability.

Integer Overflow

Weakness Enumeration

CWE-190

Related Identifiers

CVE-2024-30212

Affected Products

Mplab® Harmony 3 Core Module

Blackleak

Core

Mplab Harmony

References · 6

• https://github.com/Microchip-MPLAB-Harmony/core/commit/d4608a4f1a140bd899cd4337cdbfb343a4339216 · Patch
• https://nvd.nist.gov/vuln/detail/CVE-2024-30212 · Security Note
• https://osv.dev/vulnerability/CVE-2024-30212 · Vendor Advisory
• https://github.com/Microchip-MPLAB-Harmony/core/blob/master/release_notes.md · Note
• https://github.com/Fehr-GmbH/blackleak · Note
• https://t.me/cvenotify/81222 · Telegram Post