PT-2026-2850 · Arm · Arm Cpu

Published 2026-01-14 · Updated 2026-01-14 · CVE-2025-0647

Positive Technologies (AI Summary)

CVSS v3.1

7.9

High

Base vector

AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:N

Name of the Vulnerable Software and Affected Versions Arm CPUs (affected versions not specified)

Description A condition in certain Arm CPUs can cause a CPP RCTX instruction executed on one Processing Element (PE) to prevent TLB invalidation when a TLBI is issued to that PE, whether by the same PE or another PE within the shareability domain. This can result in a PE retaining outdated TLB entries that should have been invalidated by the TLBI instruction. TLB stands for Translation Lookaside Buffer, and TLBI stands for Translation Lookaside Buffer Invalidation.

Recommendations At the moment, there is no information about a newer version that contains a fix for this vulnerability.

Weakness Enumeration

CWE-226

Related Identifiers

CVE-2025-0647

Affected Products

Arm Cpu

References · 4

• https://developer.arm.com/documentation/111546 · Vendor Advisory
• https://nvd.nist.gov/vuln/detail/CVE-2025-0647 · Security Note
• https://graph.volerion.com/view?ID=CVE-2025-0647 · Note
• https://twitter.com/CVEnew/status/2011555230228627949 · Twitter Post